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encryption_sm
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include
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memmap.h

memmap.h 2.2 KB
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  1. // ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    2. 

  2. // File name    : memmap.h
    3. 

  3. // Version      : V0.1
    4. 

  4. // ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    5. 

  5. 

  6. #ifndef __MEMMAP_H__
    7. 

  7. #define __MEMMAP_H__
    8. 

  8. 

  9. 

  10. #define IOCTRL_BASE_ADDR	    (0x63f00000)
    11. 

  11. #define CCM_BASE_ADDR	        (0x63f04000)
    12. 

  12. #define RESET_BASE_ADDR         (0x63f08000)
    13. 

  13. #define SM1_BASE_ADDR           (0x63f1c000)
    14. 

  14. #define CRYPTO_BASE_ADDR        (0x63f20000)
    15. 

  15. #define ENCR1_BASE_ADDR         (0x63f24000)
    16. 

  16. #define LD_BASE_ADDR            (0x63f38000)
    17. 

  17. #define TRNG_BASE_ADDR          (0x63f40000)
    18. 

  18. #define PGD_BASE_ADDR           (0x63f5c000)
    19. 

  19. #define SECDET_BASE_ADDR        (0x63f60000)
    20. 

  20. #define SHA_BASE_ADDR           (0x63f64000)
    21. 

  21. #define EFM_BASE_ADDR           (0x63f80000)
    22. 

  22. #define CPM_BASE_ADDR           (0x63f88000)
    23. 

  23. #define DES_BASE_ADDR           (0x00c90000)
    24. 

  24. #define AES_BASE_ADDR           (0x00cf0000)
    25. 

  25. #define SM4_BASE_ADDR           (0x00de0000)
    26. 

  26. #define USBC_BASE_ADDR          (0x01000000)
    27. 

  27. #define DMAC_BASE_ADDR          (0x03000000)
    28. 

  28. #define SPI1_BASE_ADDR          (0x70000000)
    29. 

  29. #define SPI2_BASE_ADDR          (0x70010000)
    30. 

  30. #define SPI3_BASE_ADDR          (0x70020000)
    31. 

  31. #define SCI_BT_BASE_ADDR        (0x70030000)
    32. 

  32. #define SCI2_BASE_ADDR           (0x70040000)
    33. 

  33. #define PIT_BASE_ADDR           (0x70050000)
    34. 

  34. #define PIT32_BASE_ADDR         (0x70060000)
    35. 

  35. #define TC_BASE_ADDR            (0x70070000)
    36. 

  36. #define EPORT_BASE_ADDR         (0x70080000)
    37. 

  37. #define EPORT1_BASE_ADDR        (0x70130000)
    38. 

  38. #define WDT_BASE_ADDR           (0x70090000)
    39. 

  39. #define ADC_BASE_ADDR           (0x700a0000)
    40. 

  40. #define I2C_BASE_ADDR           (0x700b0000)
    41. 

  41. #define USI2_BASE_ADDR          (0x700d0000)
    42. 

  42. #define USI3_BASE_ADDR          (0x700e0000)
    43. 

  43. #define EDMAC_BASE_ADDR         (0x700f0000)
    44. 

  44. #define MCC_BASE_ADDR           (0x70100000)
    45. 

  45. #define RTC_BASE_ADDR           (0x70110000)
    46. 

  46. #define PWM_BASE_ADDR           (0x70120000)
    47. 

  47. #define PCI_BASE_ADDR           (0x63f10000)
    48. 

  48. #define CRC0_BASE_ADDR          (0x78000000)
    49. 

  49. #define CRC1_BASE_ADDR          (0x7c000000)
    50. 

  50. #define CACHE_BASE_ADDR         (0xfff00000)
    51. 

  51. #define MPU_BASE_ADDR           (0xffff0000)
    52. 

  52. #define EIC_BASE_ADDR           (0xe0000000)
    53. 

  53. #define ETP_BASE_ADDR 		    (0xe0001000)
    54. 

  54. 

  55. #endif /* __MEMMAP_H__ */
    56.