interrupt.h 4.2 KB

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  1. #ifndef __INTERRUPT_REG_H__
  2. #define __INTERRUPT_REG_H__
  3. #include "type.h"
  4. //priority
  5. #define PRIORITY0 (0x00<<6)
  6. #define PRIORITY1 (0x01<<6)
  7. #define PRIORITY2 (0x02<<6)
  8. #define PRIORITY3 (0x03<<6)
  9. #define EIC_BASEADDR 0xE0000000
  10. #define EIC_ICSR (EIC_BASEADDR|0x00)
  11. #define EIC_IER (EIC_BASEADDR|0x10)
  12. //interrupt pend set register
  13. #define EIC_IPSR (EIC_BASEADDR|0x18)
  14. //interrut pend clear register
  15. #define EIC_IPCR (EIC_BASEADDR|0x1C)
  16. //priority level select registers
  17. #define PLSR (EIC_BASEADDR|0x40)
  18. #define PLSR0_3 (EIC_BASEADDR|0x40)
  19. #define PLSR4_7 (EIC_BASEADDR|0x44)
  20. #define PLSR8_11 (EIC_BASEADDR|0x48)
  21. #define PLSR12_15 (EIC_BASEADDR|0x4C)
  22. #define PLSR16_19 (EIC_BASEADDR|0x50)
  23. #define PLSR20_23 (EIC_BASEADDR|0x54)
  24. #define PLSR24_27 (EIC_BASEADDR|0x58)
  25. #define PLSR28_31 (EIC_BASEADDR|0x5C)
  26. //system priority level select register
  27. #define SYS_PRIORITY_LEVEL_SELECT (EIC_BASEADDR|0x60)
  28. //bit define
  29. #define bit31 0x80000000
  30. #define bit30 0x40000000
  31. #define bit29 0x20000000
  32. #define bit28 0x10000000
  33. #define bit27 0x08000000
  34. #define bit26 0x04000000
  35. #define bit25 0x02000000
  36. #define bit24 0x01000000
  37. #define bit23 0x00800000
  38. #define bit22 0x00400000
  39. #define bit21 0x00200000
  40. #define bit20 0x00100000
  41. #define bit19 0x00080000
  42. #define bit18 0x00040000
  43. #define bit17 0x00020000
  44. #define bit16 0x00010000
  45. #define bit15 0x00008000
  46. #define bit14 0x00004000
  47. #define bit13 0x00002000
  48. #define bit12 0x00001000
  49. #define bit11 0x00000800
  50. #define bit10 0x00000400
  51. #define bit09 0x00000200
  52. #define bit08 0x00000100
  53. #define bit07 0x00000080
  54. #define bit06 0x00000040
  55. #define bit05 0x00000020
  56. #define bit04 0x00000010
  57. #define bit03 0x00000008
  58. #define bit02 0x00000004
  59. #define bit01 0x00000002
  60. #define bit00 0x00000001
  61. //PSR bit
  62. #define PSR_S bit31
  63. //#define PSR_SP bint29+bit28
  64. #define PSR_VEC bit22+bit21+bit20+bit19+bit18+bit17+bit16
  65. //#define TM bit15+bit14
  66. //#define TP bit13
  67. //#define TCTL bit12
  68. //#define SC bit10
  69. //#define MM bit09
  70. #define EE bit08
  71. //#define IC bit07
  72. #define IE bit06
  73. //#define FE bit04
  74. //#define AF bit01
  75. #define C bit00
  76. #define VECTOR_OFFSET 32
  77. //Macros and functions for controlling interrupts
  78. extern void Write_PSR(unsigned long);
  79. extern unsigned long Read_PSR(void);
  80. //core interrupt
  81. #define Enable_Interrupts Write_PSR(Read_PSR() | EE | IE)
  82. #define Disable_Interrupts Write_PSR(Read_PSR() & ~EE & ~IE)
  83. #define Clear_VBR Write_VBR((Read_VBR() & 0) | 0x00801000)
  84. //#define Clear_VBR Write_VBR((Read_VBR() & 0))
  85. /* Bit minipulation */
  86. #define BIT(x) ((UINT32)1 << (x))
  87. #define BIT_SET(value,bit) (value |= (1 << bit))
  88. #define BIT_CLR(value,bit) (value &= ~(1 << bit))
  89. #define CHKBIT(val, bit) ((val)&(bit))
  90. #define W32(addr,value) (*(volatile unsigned long *)(addr))=((unsigned long)(value))
  91. #define R32(addr) (*(volatile unsigned long *)(addr))
  92. #define REG32(addr) (*(volatile unsigned long *)(addr))
  93. extern unsigned char Read_VEC();
  94. #define INTERRUPT_SOURCE_SCI1 31
  95. #define INTERRUPT_SOURCE_SM4_AES 30
  96. #define INTERRUPT_SOURCE_SHA 29
  97. #define INTERRUPT_SOURCE_TRNG 28
  98. #define INTERRUPT_SOURCE_RTC 27
  99. #define INTERRUPT_SOURCE_USI3 26
  100. #define INTERRUPT_SOURCE_USB 25
  101. #define INTERRUPT_SOURCE_TC_PWM 24
  102. #define INTERRUPT_SOURCE_USI2 23
  103. #define INTERRUPT_SOURCE_EFM 22
  104. #define INTERRUPT_SOURCE_I2C 21
  105. #define INTERRUPT_SOURCE_SCI2 20
  106. #define INTERRUPT_SOURCE_MCC 19
  107. #define INTERRUPT_SOURCE_PAD_WAKEUP 18
  108. #define INTERRUPT_SOURCE_ADC 17
  109. #define INTERRUPT_SOURCE_EDMAC 16
  110. #define INTERRUPT_SOURCE_PMU 15
  111. #define INTERRUPT_SOURCE_ASYNC_TIMER 14
  112. #define INTERRUPT_SOURCE_PCI 13
  113. #define INTERRUPT_SOURCE_EPORT7 12
  114. #define INTERRUPT_SOURCE_EPORT6 11
  115. #define INTERRUPT_SOURCE_EPORT5 10
  116. #define INTERRUPT_SOURCE_EPORT4 9
  117. #define INTERRUPT_SOURCE_EPORT3 8
  118. #define INTERRUPT_SOURCE_EPORT2 7
  119. #define INTERRUPT_SOURCE_EPORT1 6
  120. #define INTERRUPT_SOURCE_EPORT0 5
  121. #define INTERRUPT_SOURCE_DMA 4
  122. #define INTERRUPT_SOURCE_PIT2 3
  123. #define INTERRUPT_SOURCE_PIT1 2
  124. #define INTERRUPT_SOURCE_SEC_DET 1
  125. #define INTERRUPT_SOURCE_RSA 0
  126. void interrupt_setup(Uint8 int_num, Uint8 priority);
  127. #endif