#ifndef __INTERRUPT_REG_H__ #define __INTERRUPT_REG_H__ #include "type.h" //priority #define PRIORITY0 (0x00<<6) #define PRIORITY1 (0x01<<6) #define PRIORITY2 (0x02<<6) #define PRIORITY3 (0x03<<6) #define EIC_BASEADDR 0xE0000000 #define EIC_ICSR (EIC_BASEADDR|0x00) #define EIC_IER (EIC_BASEADDR|0x10) //interrupt pend set register #define EIC_IPSR (EIC_BASEADDR|0x18) //interrut pend clear register #define EIC_IPCR (EIC_BASEADDR|0x1C) //priority level select registers #define PLSR (EIC_BASEADDR|0x40) #define PLSR0_3 (EIC_BASEADDR|0x40) #define PLSR4_7 (EIC_BASEADDR|0x44) #define PLSR8_11 (EIC_BASEADDR|0x48) #define PLSR12_15 (EIC_BASEADDR|0x4C) #define PLSR16_19 (EIC_BASEADDR|0x50) #define PLSR20_23 (EIC_BASEADDR|0x54) #define PLSR24_27 (EIC_BASEADDR|0x58) #define PLSR28_31 (EIC_BASEADDR|0x5C) //system priority level select register #define SYS_PRIORITY_LEVEL_SELECT (EIC_BASEADDR|0x60) //bit define #define bit31 0x80000000 #define bit30 0x40000000 #define bit29 0x20000000 #define bit28 0x10000000 #define bit27 0x08000000 #define bit26 0x04000000 #define bit25 0x02000000 #define bit24 0x01000000 #define bit23 0x00800000 #define bit22 0x00400000 #define bit21 0x00200000 #define bit20 0x00100000 #define bit19 0x00080000 #define bit18 0x00040000 #define bit17 0x00020000 #define bit16 0x00010000 #define bit15 0x00008000 #define bit14 0x00004000 #define bit13 0x00002000 #define bit12 0x00001000 #define bit11 0x00000800 #define bit10 0x00000400 #define bit09 0x00000200 #define bit08 0x00000100 #define bit07 0x00000080 #define bit06 0x00000040 #define bit05 0x00000020 #define bit04 0x00000010 #define bit03 0x00000008 #define bit02 0x00000004 #define bit01 0x00000002 #define bit00 0x00000001 //PSR bit #define PSR_S bit31 //#define PSR_SP bint29+bit28 #define PSR_VEC bit22+bit21+bit20+bit19+bit18+bit17+bit16 //#define TM bit15+bit14 //#define TP bit13 //#define TCTL bit12 //#define SC bit10 //#define MM bit09 #define EE bit08 //#define IC bit07 #define IE bit06 //#define FE bit04 //#define AF bit01 #define C bit00 #define VECTOR_OFFSET 32 //Macros and functions for controlling interrupts extern void Write_PSR(unsigned long); extern unsigned long Read_PSR(void); //core interrupt #define Enable_Interrupts Write_PSR(Read_PSR() | EE | IE) #define Disable_Interrupts Write_PSR(Read_PSR() & ~EE & ~IE) #define Clear_VBR Write_VBR((Read_VBR() & 0) | 0x00801000) //#define Clear_VBR Write_VBR((Read_VBR() & 0)) /* Bit minipulation */ #define BIT(x) ((UINT32)1 << (x)) #define BIT_SET(value,bit) (value |= (1 << bit)) #define BIT_CLR(value,bit) (value &= ~(1 << bit)) #define CHKBIT(val, bit) ((val)&(bit)) #define W32(addr,value) (*(volatile unsigned long *)(addr))=((unsigned long)(value)) #define R32(addr) (*(volatile unsigned long *)(addr)) #define REG32(addr) (*(volatile unsigned long *)(addr)) extern unsigned char Read_VEC(); #define INTERRUPT_SOURCE_SCI1 31 #define INTERRUPT_SOURCE_SM4_AES 30 #define INTERRUPT_SOURCE_SHA 29 #define INTERRUPT_SOURCE_TRNG 28 #define INTERRUPT_SOURCE_RTC 27 #define INTERRUPT_SOURCE_USI3 26 #define INTERRUPT_SOURCE_USB 25 #define INTERRUPT_SOURCE_TC_PWM 24 #define INTERRUPT_SOURCE_USI2 23 #define INTERRUPT_SOURCE_EFM 22 #define INTERRUPT_SOURCE_I2C 21 #define INTERRUPT_SOURCE_SCI2 20 #define INTERRUPT_SOURCE_MCC 19 #define INTERRUPT_SOURCE_PAD_WAKEUP 18 #define INTERRUPT_SOURCE_ADC 17 #define INTERRUPT_SOURCE_EDMAC 16 #define INTERRUPT_SOURCE_PMU 15 #define INTERRUPT_SOURCE_ASYNC_TIMER 14 #define INTERRUPT_SOURCE_PCI 13 #define INTERRUPT_SOURCE_EPORT7 12 #define INTERRUPT_SOURCE_EPORT6 11 #define INTERRUPT_SOURCE_EPORT5 10 #define INTERRUPT_SOURCE_EPORT4 9 #define INTERRUPT_SOURCE_EPORT3 8 #define INTERRUPT_SOURCE_EPORT2 7 #define INTERRUPT_SOURCE_EPORT1 6 #define INTERRUPT_SOURCE_EPORT0 5 #define INTERRUPT_SOURCE_DMA 4 #define INTERRUPT_SOURCE_PIT2 3 #define INTERRUPT_SOURCE_PIT1 2 #define INTERRUPT_SOURCE_SEC_DET 1 #define INTERRUPT_SOURCE_RSA 0 void interrupt_setup(Uint8 int_num, Uint8 priority); #endif